Cambridge · Form 2 · Syllabus 2210
Computer Science
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- Data representation Binary (base 2), denary (base 10) and hexadecimal (base 16); converting between them; binary addition and overflow; logical binary shifts (left shift multiplies by 2; right shift divides by 2); two's complement for negative integers (8-bit range −128 to 127).
- Hardware The CPU (ALU, control unit, registers – PC, MAR, MDR, CIR, ACC), buses (address, data, control) and the fetch–decode–execute cycle in Von Neumann architecture. Performance factors: clock speed, number of cores, cache size. Embedded systems in household and industrial devices.